Gordon Greenley

4250562, Feb 10, 1981

May 22, 1979

6/041361

George A. Haag - Colorado Springs CO
Douglas Fogg - Loveland CO
Gordon A. Greenley - Colorado Springs CO
Steve A. Shepard - Colorado Springs CO
F. Duncan Terry - Meridan IL

Hewlett-Packard Company - Palo Alto CA

G06F 305
G06F 3153

364900

A general purpose logic state analyzer selectively stores, formats and displays a digital signal representing a sequence of data states input thereto and provides a graphical display of the stored data states and a count of selected events occurring intermediate to the occurrence of the data states stored. Selective storage of the input data states is provided by comparing the input data states to a preselected sequence of first qualifier state conditions and enabling the storage of input data states in response to the satisfaction of the preselected sequence. Storage is further qualified by storing only data states which individually meet one of a preselected set of second qualifier state conditions. Selective formatting of the stored data states is provided by converting the stored data states in response to selectable assignments of contiguous sets of bits of each stored data state to logical fields, a selectable concatenation of the logical fields, and to radices selected for each of the respective logical fields. The converted stored data states can be displayed as a formatted listing or as a graphical display.

4455624, Jun 19, 1984

Jan 13, 1983

6/457599

George A. Haag - Colorado Springs CO
O. Douglas Fogg - Loveland CO
Gordon A. Greenley - Colorado Springs CO
Steve A. Shepard - Colorado Springs CO
F. Duncan Terry - Meridan ID

Hewlett-Packard Company - Palo Alto CA

G06F 314
G06F 700

364900

Ongoing succession of states occurring in a collection of digital signals is monitored by a logic state analyzer which stores either all such states or a selected subset thereof meeting certain qualification criteria. The memory into which the states are stored is updated with oldest stored states being overwritten as the newest states are stored, the collectivity of which may be termed a captured trace. The above-mentioned qualification and sequential criteria are termed a trace specification. The utility of such a trace in a logic state analyzer is enhanced by allowing the user to divide the collection of digital signals into groups of related signals, assign symbolic labels to the groups, and indicate a radix for each group. Such division, assignment and indication may be termed a format specification. Subsequent trace specifications as well as the displayed or printed form of the trace itself then incorporate the format specification.

6442725, Aug 27, 2002

Feb 18, 1999

09/252393

Brian Clay Schipke - Colorado Springs CO
Steven Wayne Adams - Colorado Springs CO
Michael Jon Dotseth - Colorado Springs CO
Gordon A Greenley - Colorado Springs CO

Agilent Technologies, Inc. - Palo Alto CA

G01R 3128

714741

A system and method are described for providing intelligence to an analysis probe being utilized by logic analyzers. The system provides for regenerating target system internal processor data signals for analysis by a logic analyzer from data lines that are being utilized for other purposes by the target system processor. In particular, the analysis probe includes programmable logic for providing an interface between an emulation module and the target system, a memory for receiving signal reconstruction data from the emulation module, a processor for generating a data map from signal reconstruction data, and programmable logic for generating a target system internal signal from at least one of a plurality of target system data signals and the signal reconstruction data.

4479197, Oct 23, 1984

Dec 29, 1982

6/454387

George A. Haag - Colorado Springs CO
O. Douglas Fogg - Loveland CO
Gordon A. Greenley - Colorado Springs CO
Steve A. Shepard - Colorado Springs CO
F. Duncan Terry - Meridan ID

Hewlett-Packard Company - Palo Alto CA

G06F 3153

364900

The operating modes and parameters of a logic state analyzer are selected by user interaction with a menu displayed upon a CRT. At the highest level of control the user may specify which menu is of interest, should there be more than one. The selected menu is displayed and contains mode selection fields whose labels indicate the various modes that are presently selected. Different modes are selected by positioning a cursor to the associated selection field and then pressing a mode selection key. Each such activation causes the next mode in a sequence of modes, associated with that particular field, to be the selected mode of operation. A descriptive label or phase corresponding to the selected mode is displayed as part of the selection field containing the cursor. The modes and their associated labels are linked in a cyclic order, and repeated activation of the field select key will cycle through the cyclic sequence indefinitely, revealing to the operator what his choices are, as well as indicating the present choice. The cursor may be positioned in random order among several such mode selection fields, but only one field select key is needed, as its above-described action pertains to whichever field contains the cursor.

4495599, Jan 22, 1985

Jan 6, 1983

6/456155

George A. Haag - Colorado Springs CO
O. Douglas Fogg - Loveland CO
Gordon A. Greenley - Colorado Springs CO
Steve A. Shepard - Colorado Springs CO
F. Duncan Terry - Meridan ID

Hewlett-Packard Company - Palo Alto CA

G06F 305
G06F 3153

364900

A logic state analyzer monitors an ongoing succession of logic states occurring in a collection of n-many digital signals, and stores in a memory a set of logic states selected from the ongoing succession. A logic state is any one of the 2. sup. n -1 possible patterns the n-many digital signals may exhibit. The memory is of some convenient fixed number of locations, and once the memory is filled the oldest stored logic states are overwritten as the newest logic states are stored. Various storage qualification criteria may be specified, in which case an individual logic state is not stored unless it meets those criteria. Upon recognition of a specified trigger condition in the succession of logic states the logic state analyzer stores an operator selectable number of additional logic states, after which the monitoring and storing of logic states ceases and the stored contents of the memory are displayed. The trigger condition may be the detection of a designated sequence of selected logic states. A sequence detector monitors the ongoing succession of logic states.

4445192, Apr 24, 1984

Jan 20, 1983

6/459425

George A. Haag - Colorado Springs CO
O. Douglas Fogg - Loveland CO
Gordon A. Greenley - Colorado Springs CO
Steve A. Shepard - Colorado Springs CO
F. Duncan Terry - Meridan ID

Hewlett-Packard Company - Palo Alto CA

G06F 314
G06F 700

364900

A logic state analyzer monitors the ongoing succession of states occurring in a collection of digital signals, and stores in a memory either all such states or a selected subset thereof meeting certain qualification criteria. The oldest stored states are overwritten as the newest states are stored. Upon recognition of some trigger condition the logic state analyzer will subsequently store a preselected number of additional states, the collectivity of which may be termed the captured trace. The utility of such a trace in a logic state analyzer is enhanced by equipping the analyzer with a counting mechanism selectively responsive to a high speed clock signal or a programmable state detector. In the former case the counter operates as a timer whose value may represent either the elapsed time between consecutive states in the trace or between each state in the trace and an origin along a time axis. In the latter case the user identifies a state or event of interest and the counter records the number of times that state occurs between the stored states of the trace.

4373193, Feb 8, 1983

Nov 25, 1980

6/210462

George A. Haag - Colorado Springs CO
O. Douglas Fogg - Loveland CO
Gordon A. Greenley - Colorado Springs CO
Steve A. Shepard - Colorado Springs CO
F. Duncan Terry - Meridan ID

Hewlett-Packard Company - Palo Alto CA

G06F 305
G06F 3153

364900

A logic state analyzer stores into a data acquisition memory only state data meeting preselected qualification state criteria chosen to weed out state data not of interest among the totality of states occuring within a collection of digital signals. The data acquisition memory retains only the last m-many states stored therein. A selectable integer k, o. ltoreq. k. ltoreq. m, determines how many additional storage operations are performed for qualified state data following the detection of a preselected trigger condition. The actual number of states occurring in the collection of digital signals after the trigger condition but before the storage of the kth qualified data state can be many times the value of k. Qualifying the state data prior to storage allows a modest size data acquisition memory to do the work of a much larger memory and spares the user the task of sorting through much state data known not to be of interest. The preselected qualification criteria may include don't-cares in the definition of the qualification state, as well as the logical OR'ing of a plurality of such qualification states.

4303987, Dec 1, 1981

May 22, 1979

6/041363

George A. Haag - Colorado Springs CO
O. Douglas Fogg - Loveland CO
Gordon A. Greenley - Colorado Springs CO
Steve A. Shepard - Colorado Springs CO
F. Duncan Terry - Meridan ID

Hewlett-Packard Company - Palo Alto CA

G06F 3153
G06F 305

364900

A general purpose logic state analyzer selectively stores, formats and displays a digital signal representing a sequence of data states input thereto and provides a graphical display of the stored data states and a count of selected events occurring intermediate to the occurrence of the data states stored. Selective storage of the input data states is provided by comparing the input data states to a preselected sequence of first qualifier state conditions and enabling the storage of input data states in response to the satisfaction of the preselected sequence. Storage is further qualified by storing only data states which individually meet one of a preselected set of second qualifier state conditions. Selective formatting of the stored data states is provided by converting the stored data states in response to selectable assignments of contiguous sets of bits of each stored data state to logical fields, a selectable concatenation of the logical fields, and to radicies selected for each of the respective logical fields. The converted stored data states can be displayed as a formatted listing or as a graphical display.