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Nishant Sinha

In the United States, there are 20 individuals named Nishant Sinha spread across 18 states, with the largest populations residing in New Jersey, California, Georgia. These Nishant Sinha range in age from 26 to 51 years old. Some potential relatives include Pankaj Sinha, Natasha Sinha, Sunita Sinha. You can reach Nishant Sinha through various email addresses, including ssow***@hotmail.com, ek_sh***@hotmail.com, nishant.si***@hotmail.com. The associated phone number is 480-205-0630, along with 6 other potential numbers in the area codes corresponding to 770, 515, 208. For a comprehensive view, you can access contact details, phone numbers, addresses, emails, social media profiles, arrest records, photos, videos, public records, business records, resumes, CVs, work history, and related names to ensure you have all the information you need.

Public information about Nishant Sinha

Resumes

Resumes

Nishant Sinha

Nishant Sinha Photo 1
Location:
Seattle, Washington
Industry:
Logistics and Supply Chain

Search Executive At Moftware

Nishant Sinha Photo 2
Position:
Search Executive at Moftware
Location:
Houston, Texas Area
Industry:
Consumer Electronics
Work:
Moftware
Search Executive
Education:
Sikkim Manipal University of Health, Medical and Technological Sciences 2007 - 2009
MBA, Information System

Nishant Sinha

Nishant Sinha Photo 3
Position:
Senior Strategist - Memory & Systems Architecture at Micron Technology
Location:
Boise, Idaho
Industry:
Semiconductors
Work:
Micron Technology - Boise, Idaho Area since Jan 2013
Senior Strategist - Memory & Systems Architecture Micron Technology - Boise, Idaho Area Jun 2011 - Dec 2012
Director, LED & Solid State Lighting (SSL) Strategy & Innovation Micron Technology - Boise, Idaho Area Mar 2010 - May 2010
Business Venture Development Manager, Strategy & Business Management Group, Silicon Systems Group Micron Technology - Boise, Idaho Area Oct 2007 - Mar 2010
Advanced Technology Manager, Advanced Technology Group, Process R&D Micron Technology Jan 2009 - May 2009
Business Development Manager, Silicon & Systems Group Micron Technology, Inc. - Boise, Idaho Area Jun 2005 - Oct 2007
Strategic Process R&D Manager [CMP, Wet Process, Plating, Metrology & Inspection] Micron Technology, Inc - Boise, Idaho Area Apr 2004 - Sep 2005
Plating Technology & 2nd Shift CMP, Wet Process & Plating Group Process R&D Leader Micron Technology - Boise, Idaho Area Apr 1999 - Apr 2004
Sr. Process Development Engineer, Plating, CMP & PVD R&D
Education:
Columbia University in the City of New York 2008 - 2010
Iowa State University 1997 - 1999
Indian Institute of Technology, Kanpur 1991 - 1996
Skills:
Semiconductors, Silicon, R&D, Strategy, Start-ups, Program Management, Product Development, Process Simulation, Competitive Analysis, Integration, Business Planning, Matrix Management, Product Management, Engineering Management, New Business Development, Customer Engagement, Cross-functional Team Leadership, Thin Films, Metrology, Solid State Lighting, PVD, Yield, Characterization, Failure Analysis, Electronics
Honor & Awards:
Graduate Fellowship, Chemical Engineering Dept, Iowa State University 7 Publications in Journal of Electrochemical Society, UCPSS-IMEC, Nanomatrials. Served as reviewer for Journal of Electrochemical Society

Nishant Sinha

Nishant Sinha Photo 4
Location:
United States

Nishant Sinha

Nishant Sinha Photo 5
Location:
United States

Manager - Consulting - Travel & Hospitality At Cognizant Business Consulting

Nishant Sinha Photo 6
Position:
Manager - Consulting at Cognizant Technology Solutions
Location:
Phoenix, Arizona Area
Industry:
Information Technology and Services
Work:
Cognizant Technology Solutions since 2011
Manager - Consulting Cognizant Technology Solutions May 2008 - Apr 2011
Consultant Travel & Hospitality - Cognizant Business Consulting HCL Technologies May 2007 - May 2008
Manager - Business Development Radisson Hotels Nov 2005 - Jun 2006
Materials Manager Taj Sats Air Catering Limited Jun 2003 - Nov 2005
Management Trainee & Purchase Officer Taj Group of Hotels 2000 - 2003
F & B Service & Banquet Sales Executive
Education:
S.P. Jain Institute of Management & Research 2006 - 2007
MBA, Marketing Indira Gandhi National Open University 1999 - 2003
BTS, Bachelors in Tourism Studies Institute of Hotel Management Kolkata 1997 - 2000
Diploma, Hotel Management

Technology Analyst At Infosys Limited

Nishant Sinha Photo 7
Position:
Technology Analyst at Infosys Limited
Location:
Jaipur, Rajasthan, India
Industry:
Computer Software
Work:
Infosys Limited - Jaipur City, Rajasthan, India since Jul 2012
Technology Analyst Acro Technologies (India) Pvt. Ltd. - Noida Area, India Feb 2012 - Jun 2012
Snr. Programmer Analyst (Role: Team Leader) Acro Technologies (India) Pvt. Ltd. - Noida Area, India Jun 2011 - Jan 2012
Programmer Analyst Acro Technologies (India) Pvt. Ltd. - New Delhi Area, India Jul 2007 - May 2011
Software Developer
Education:
Rajiv Gandhi Prodyogiki Vishwavidyalaya 2003 - 2007
Bachelor of Engineering (B.E.), Computer Sciencev & Engineeing Madhya Pradesh, Diamond Mining Project Shool, Panna 1994 - 2002
Bachelor of Engineering, Computer Science
Skills:
ASP.NET, ASP.NET AJAX, SQL Server, VBScript, JavaScript, JASON, HTML, .NET Remoting, WCF, WCF Services, C#, .NET Compact Framework, TFS, Reflection, File Handling, State Management, Threads, ADO.NET, IIS, MySQL, Web Services, SSIS, Git
Certifications:
Microsoft Certified Technology Specialist (MCTS), Microsoft Corporation

Nishant Sinha - Bentonville, AR

Nishant Sinha Photo 8
Work:
Tata Consultancy Services - Bentonville, AR
IT Analyst
Education:
BMC Jul 2012 to 2000
bank BMC Aug 2011 to Jun 2012
Spanish Stanford - UK Jun 2009 to Mar 2011
DDS in Design System BMC 2011
Technology Sikkim Manipal University Sep 2010
Master of Computer Application St. Xavier's College - Ranchi, Jharkhand May 2007
Bachelor of Science in Computer Application St. Xavier's College - Ranchi, Jharkhand May 2003
Education Council SVM Secondary School - Gumla, Jharkhand, IN May 2001
CBSE in Mathematics and Science BMC
communication
Skills:
Java J2ee, PL SQL,BMC Remedy, Load Test VuGen,Unix, WAS 7, Production Support, ITIL V3 certified
Background search with BeenVerified
Data provided by Veripages

Phones & Addresses

Name
Addresses
Phones
Nishant Sinha
412-362-1315
Nishant Sinha
208-429-8620
Nishant Sinha
515-292-0096
Nishant Sinha
208-429-1626
Nishant Sinha
208-429-8620

Publications

Us Patents

Microelectronic Devices With Improved Heat Dissipation And Methods For Cooling Microelectronic Devices

US Patent:
6710442, Mar 23, 2004
Filed:
Aug 27, 2002
Appl. No.:
10/228906
Inventors:
Joseph T. Lindgren - Boise ID
Warren M. Farnworth - Nampa ID
William M. Hiatt - Eagle ID
Nishant Sinha - Boise ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 2310
US Classification:
257706
Abstract:
Microelectronic devices with improved heat dissipation, methods of making microelectronic devices, and methods of cooling microelectronic devices are disclosed herein. In one embodiment, the microelectronic device includes a microelectronic substrate having a first surface, a second surface facing opposite from the first surface, and a plurality of active devices at least proximate to the first surface. The second surface has a plurality of heat transfer surface features that increase the surface area of the second surface. In another embodiment, an enclosure having a heat sink and a single or multi-phase thermal conductor can be positioned adjacent to the second surface to transfer heat from the active devices.

High Aspect Ratio Fill Method And Resulting Structure

US Patent:
6756682, Jun 29, 2004
Filed:
Mar 3, 2003
Appl. No.:
10/376280
Inventors:
Nishant Sinha - Boise ID
Paul A. Morgan - Kuna ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 2940
US Classification:
257774, 257763, 257766
Abstract:
A method is described for filling of high aspect ratio contact vias provided over silicon containing areas. A via is formed in an insulating layer over the silicon containing area and a silicide forming material is deposited in the via. A silicide region is formed over the silicon containing area, the silicide forming material is removed from the via leaving the silicide region. The via is then filled with a conductor using an electroless plating process.

Slurry For Use In Polishing Semiconductor Device Conductive Structures That Include Copper And Tungsten And Polishing Methods

US Patent:
6551935, Apr 22, 2003
Filed:
Aug 31, 2000
Appl. No.:
09/653392
Inventors:
Nishant Sinha - Boise ID
Dinesh Chopra - Boise ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 2100
US Classification:
438693, 156345, 216 38, 216 89, 252 792, 252 794, 438745, 438754
Abstract:
Method for substantially simultaneously polishing a copper conductive structure of a semiconductor device structure and an adjacent barrier layer. The method includes use of a polishing pad with a slurry solution in which copper and a material, such as tungsten, of the barrier layer are removed at substantially the same rate. The slurry is formulated so as to oxidize copper and a material of the barrier layer at substantially the same rates. Thus, copper and the barrier layer material have substantially the same oxidation energies in the slurry. Systems for substantially polishing copper conductive structures and adjacent barrier structures on semiconductor device structures are also disclosed.

Filling Plugs Through Chemical Mechanical Polish

US Patent:
6757971, Jul 6, 2004
Filed:
Aug 30, 2001
Appl. No.:
09/943582
Inventors:
Nishant Sinha - Boise ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01K 310
US Classification:
29852, 29846, 438655, 438660, 438661, 438672, 438675, 438357FOR, 438358FOR, 427 97, 427 99
Abstract:
A scheme for filling plugs through chemical mechanical polishing comprises depositing a malleable conductive layer over a dielectric layer having openings formed therein. The malleable conductive layer is deposited such that a liner is formed within the openings, however the openings are not completely filled. A chemical mechanical polishing process using an alumina based slurry at a neutral or slightly basic pH and no oxidizer is used to smear the malleable conductive layer sufficiently to fill the remainder of the openings in the dielectric layer forming filled or substantially filled plugs.

Constructions Comprising Solder Bumps

US Patent:
6759751, Jul 6, 2004
Filed:
Apr 28, 2003
Appl. No.:
10/425378
Inventors:
Nishant Sinha - Boise ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 2348
US Classification:
257779, 257780, 257781
Abstract:
The invention includes a method of electroless deposition of nickel over an aluminum-containing material. A mass is formed over the aluminum-containing material, with the mass predominantly comprising a metal other than aluminum. The mass is exposed to palladium, and subsequently nickel is electroless deposited over the mass. The invention also includes a method of electroless deposition of nickel over aluminum-containing materials and copper-containing materials. The aluminum-containing materials and copper-containing materials are both exposed to palladium-containing solutions prior to electroless deposition of nickel over the aluminum-containing materials and copper-containing materials. Additionally, the invention includes a method of forming a solder bump over an aluminum-containing material.

Methods Of Electroless Deposition Of Nickel, Methods Of Forming Under Bump Metallurgy, And Constructions Comprising Solder Bumps

US Patent:
6586043, Jul 1, 2003
Filed:
Jan 9, 2002
Appl. No.:
10/043431
Inventors:
Nishant Sinha - Boise ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
B05D 512
US Classification:
427123, 427125, 427304, 427305, 427404, 427405, 427437, 427438, 4274431
Abstract:
The invention includes a method of electroless deposition of nickel over an aluminum-containing material. A mass is formed over the aluminum-containing material, with the mass predominantly comprising a metal other than aluminum. The mass is exposed to palladium, and subsequently nickel is electroless deposited over the mass. The invention also includes a method of electroless deposition of nickel over aluminum-containing materials and copper-containing materials. The aluminum-containing materials and copper-containing materials are both exposed to palladium-containing solutions prior to electroless deposition of nickel over the aluminum-containing materials and copper-containing materials. Additionally, the invention includes a method of forming a solder bump over an aluminum-containing material.

High Aspect Ratio Fill Method And Resulting Structure

US Patent:
6787450, Sep 7, 2004
Filed:
May 29, 2002
Appl. No.:
10/156097
Inventors:
Nishant Sinha - Boise ID
Paul A. Morgan - Kuna ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 214763
US Classification:
438630, 438649, 438655, 438656, 438675
Abstract:
A method is described for filling of high aspect ratio contact vias provided over silicon containing areas. A via is formed in an insulating layer over the silicon containing area and a silicide forming material is deposited in the via. A silicide region is formed over the silicon containing area, the silicide forming material is removed from the via leaving the silicide region. The via is then filled with a conductor using an electroless plating process.

Method Of Fabricating Semiconductor Component Having Encapsulated, Bonded, Interconnect Contacts

US Patent:
6803303, Oct 12, 2004
Filed:
Jul 11, 2002
Appl. No.:
10/193567
Inventors:
William M. Hiatt - Eagle ID
Warren M. Farnworth - Nampa ID
Charles M. Watkins - Boise ID
Nishant Sinha - Boise ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 2144
US Classification:
438612, 438614, 438617
Abstract:
A semiconductor component includes a die having a pattern of die contacts, and interconnect contacts bonded to the die contacts and encapsulated in an insulating layer. The component also includes terminal contacts formed on tip portions of the interconnect contacts. Alternately the component can include conductors and bonding pads in electrical communication with the interconnect contacts configured to redistribute the pattern of the die contacts. A method for fabricating the component includes the steps of forming the interconnect contacts on the die contacts, and forming the insulating layer on the interconnect contacts while leaving the tip portions exposed. The method also includes the step of forming the terminal contacts on the interconnect contacts, or alternately forming the conductors and bonding pads in electrical communication with the interconnect contacts and then forming the terminal contacts on the bonding pads.

FAQ: Learn more about Nishant Sinha

How old is Nishant Sinha?

Nishant Sinha is 38 years old.

What is Nishant Sinha date of birth?

Nishant Sinha was born on 1986.

What is Nishant Sinha's email?

Nishant Sinha has such email addresses: ssow***@hotmail.com, ek_sh***@hotmail.com, nishant.si***@hotmail.com. Note that the accuracy of these emails may vary and they are subject to privacy laws and restrictions.

What is Nishant Sinha's telephone number?

Nishant Sinha's known telephone numbers are: 480-205-0630, 770-309-7613, 515-292-0096, 208-429-1626, 208-429-8620, 614-829-0400. However, these numbers are subject to change and privacy restrictions.

How is Nishant Sinha also known?

Nishant Sinha is also known as: Nishant Kumar Sinha, Nishant J Y, Kumar S Nishant. These names can be aliases, nicknames, or other names they have used.

Who is Nishant Sinha related to?

Known relatives of Nishant Sinha are: Natasha Sinha, Natasha Sinha, Pankaj Sinha, Sunita Sinha. This information is based on available public records.

What are Nishant Sinha's alternative names?

Known alternative names for Nishant Sinha are: Natasha Sinha, Natasha Sinha, Pankaj Sinha, Sunita Sinha. These can be aliases, maiden names, or nicknames.

What is Nishant Sinha's current residential address?

Nishant Sinha's current known residential address is: 4800 Westlake Pkwy Unit 802, Sacramento, CA 95835. Please note this is subject to privacy laws and may not be current.

What are the previous addresses of Nishant Sinha?

Previous addresses associated with Nishant Sinha include: 14640 S 7Th Pl, Phoenix, AZ 85048; 11430 Crossington Rd, Alpharetta, GA 30005; 1294 Shorewinds Trl, Saint Charles, MO 63303; 4800 Westlake Pkwy Unit 802, Sacramento, CA 95835; 901 E Van Buren St Apt 2069, Phoenix, AZ 85006. Remember that this information might not be complete or up-to-date.

Where does Nishant Sinha live?

Sacramento, CA is the place where Nishant Sinha currently lives.

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