Work:
Arm
Engineer
Arm
Mar 2018 - Sep 2019
Graduate Engineer
Intel Corporation
Jun 2017 - Dec 2017
Graduate Intern, Mixed Signal Verification Engineer
Sofcon Systems India Private Limited
Jul 2015 - Dec 2015
Mixed Signal Intern
Education:
San Jose State University 2016 - Dec 2017
Master of Science, Masters, Electrical Engineering
Vishwakarma Government Engineering College 2011 - 2015
Bachelor of Engineering, Bachelors, Communication, Electronics
Skills:
Microsoft Office, Linux, Ios, C, Embedded C, Verilog, Vhdl, Synopsis, Xilinx Ise, Vivado, Altera Quartus, System Verilog, Field Programmable Gate Arrays, Microchip Pic, Universal Verification Methodology, Application Specific Integrated Circuits, Matlab, Microsoft Excel, Microsoft Word, Microsoft Powerpoint, Programming, Windows, Arduino, Proteus, I2C, Embedded Systems, Spi, Avr Studio 4, Questasim, Atmega, Pic16F Board, Altera De0 Nano Soc Board, Can Bus, Microcontrollers, Assertion Based Verification, Kde, Verdi3, Rtl Coding, Rtl Verification, Jasper, Analog Circuit Design, Mips Instruction Set, Mips, Arm Architecture, Sva, Functional Coverage, Regression Testing, Problem Solving, Cross Cultural Communication Skills
Certifications:
System Verilog
Uvm In Systemverilog