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Philip Costello

In the United States, there are 166 individuals named Philip Costello spread across 34 states, with the largest populations residing in Florida, California, New York. These Philip Costello range in age from 42 to 78 years old. Some potential relatives include Robert Konieczny, Vito Leone, Vincent Leone. You can reach Philip Costello through various email addresses, including costello***@hotmail.com, dcoste***@comcast.net, philcostell***@gateway.net. The associated phone number is 954-837-0373, along with 6 other potential numbers in the area codes corresponding to 203, 281, 386. For a comprehensive view, you can access contact details, phone numbers, addresses, emails, social media profiles, arrest records, photos, videos, public records, business records, resumes, CVs, work history, and related names to ensure you have all the information you need.

Public information about Philip Costello

Resumes

Resumes

Subcontractor

Philip Costello Photo 1
Location:
Boston, MA
Industry:
Facilities Services
Work:
Refining Consultants
Subcontractor

Philip Costello

Philip Costello Photo 2
Location:
New York, NY
Work:
Nys Taconic Ddso
Education:
University of Phoenix

Data Clerk

Philip Costello Photo 3
Location:
Chicago, IL
Industry:
Education Management
Work:
The Center: Resources For Teaching and Learning
Data Clerk Costello, Mcmahon, Burke & Murphy, Ltd. Jun 2008 - Mar 2017
Law Clerk Alexian Brothers Foundation Dec 2014 - May 2016
Foundation Project Assistant
Education:
Depaul University 2009 - 2013
Bachelors, Hospitality, Business
Skills:
Microsoft Office, Raiser's Edge, Abacuslaw, Wordperfect, Adobe Photoshop, Adobe Acrobat, Gimp, Indesign, Data Entry, Databases, Microsoft Excel, Microsoft Word, Microsoft Powerpoint, Microsoft Outlook, Html, Data Analysis, Google Docs, Microsoft Access, Crystal Reports, Data Manipulation, Customer Service, Event Planning, Research
Languages:
English
Spanish

Distribution And Channel Ops Sales Support

Philip Costello Photo 4
Location:
Leominster, MA
Industry:
Computer & Network Security
Work:
Rsa Security A Division of Emc
Distribution and Channel Ops Sales Support

Business Owner

Philip Costello Photo 5
Location:
Farmington, MI
Work:
Costello Door and Millwork
Business Owner

Professor Of Radiology

Philip Costello Photo 6
Location:
Charleston, SC
Industry:
Hospital & Health Care
Work:
Medical University of South Carolina
Professor of Radiology
Education:
London University
Bachelor of Science, Bachelors, Bachelor of Medicine, Medicine
Certifications:
American Board of Radiology

Philip Costello

Philip Costello Photo 7
Location:
La Vergne, TN
Industry:
Retail
Work:
Sports Authority 2006 - 2013
Manager

Dist And Channel Specialist Sales Support

Philip Costello Photo 8
Location:
Leominster, MA
Industry:
Computer & Network Security
Work:
Rsa Security
Dist and Channel Specialist Sales Support

Phones & Addresses

Name
Addresses
Phones
Philip A. Costello
954-837-0373
Philip A Costello
630-483-9096, 630-855-6048
Philip A Costello
715-356-4383
Philip Costello
203-288-6325
Philip A Costello
978-466-1394
Philip Costello
386-623-5372
Philip Costello
209-815-3839
Philip Costello
954-632-9687
Philip Costello
813-763-4150
Philip Costello
413-374-8715
Philip Costello
203-273-1573
Philip Costello
734-497-4266

Business Records

Name / Title
Company / Classification
Phones & Addresses
Philip Costello
Principal, Attorney, Lawyer
BRAUNLICH, RUSSOW & BRAUNLICH, A PROFESSIONAL CORPORATION
Legal Services Office
111 S Macomb St, Monroe, MI 48161
734-241-8300, 734-241-7715
Philip W. Costello
President
INDEPENDENT HOUSING I, INC
1475 Roosevelt Ave, Springfield, MA 01109
128 Derryfield Ave, Springfield, MA 01118
Mr. Philip Costello
President
Hydro-Pro Irrigation, Inc.
Tree Service
16 Robbins Rd, Chicopee, MA 01020
413-592-1111
Philip J. Costello
President
NORTHERN CALIFORNIA TPG, INC
Whol General Groceries
6673 Owens Dr, Pleasanton, CA 94588
6759 Sierra Ct, Pleasanton, CA 94568
Philip Costello
President
Costello Family Enterprises, Inc
2931 Lahlor Ln, Palm Harbor, FL 34684
Philip Costello
President
HYDRO-PRO IRRIGATION, INC
Irrigation Systems
16 Robbins Rd, Chicopee, MA 01020
413-592-1111
Philip M. Costello
Director
Mattress & Beds, Inc
6809 Fountain Ave, Tampa, FL 33634
Philip W. Costello
President
INDEPENDENT HOUSING II, INC
Apartment Building Operator
24 Deer Park Dr, East Longmeadow, MA 01028
128 Derryfield Ave, Springfield, MA 01118

Publications

Us Patents

Programmable Circuit Optionally Configurable As A Lookup Table Or A Wide Multiplexer

US Patent:
7075333, Jul 11, 2006
Filed:
Aug 24, 2004
Appl. No.:
10/925259
Inventors:
Kamal Chaudhary - San Jose CA, US
Philip D. Costello - Saratoga CA, US
Venu M. Kondapalli - Sunnyvale CA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
H03K 19/173
H03K 19/177
H01L 25/00
G06F 7/38
US Classification:
326 38, 326 39, 326 41
Abstract:
Circuits that can be optionally programmed to function as lookup tables (LUTs) or wide multiplexers, and integrated circuits including these programmable circuits. A function select multiplexer is included between each memory cell and the corresponding data input terminal of a first multiplexer. Each function select multiplexer has a first data input terminal coupled to the corresponding memory cell, a second data input terminal coupled to an external input terminal, and a select terminal controlled by a value stored in a function select memory cell. When a first value is stored in the function select memory cell, the programmable circuit functions in the same fashion as a known LUT. When a second value is stored in the function select memory cell, the programmable circuit functions as a wide multiplexer, with the data input values being provided by the external input terminals.

Data Monitoring For Single Event Upset In A Programmable Logic Device

US Patent:
7109746, Sep 19, 2006
Filed:
Mar 22, 2004
Appl. No.:
10/806697
Inventors:
Martin L. Voogel - Los Altos CA, US
David P. Schultz - San Jose CA, US
Vasisht M. Vadi - San Jose CA, US
Philip D. Costello - Saratoga CA, US
Venu M. Kondapalli - Sunnyvale CA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
H03K 19/173
US Classification:
326 38, 326 41, 326113, 36523001, 36518901
Abstract:
Method and apparatus for data monitoring for error detection is described. A programmable logic device includes a configurable logic block having function generators, each of which is configurable for at least two programmable mode functions. The function generators are coupled to an array of memory cells for storing configuration bits for configuring the function generators. A primary address line is coupled to each memory cell spanning two or more of the function generators. A secondary address line is coupled to groups of memory cells associated with the function generators. A mask circuit is configured to selectively communicate a signal of the primary address line to a segment of the secondary address line or to a ground responsive in part to the program mode function.

Ring Shaped Spring Device

US Patent:
6575439, Jun 10, 2003
Filed:
Feb 21, 2002
Appl. No.:
10/078465
Inventors:
Philip G. Costello - North Haven CT
Frank R. Hrovat - Sylvania OH
Assignee:
Barnes Group Inc. - Bristol CT
International Classification:
F16F 300
US Classification:
267 89, 267179
Abstract:
A spring device comprising a pair of spaced-apart first and second annular support plates defining a ring with a central axis; a plurality of circumferentially spaced, parallel oriented coil springs disposed between said annular plates; and, a plurality of guide assemblies located at circumferentially spaced positions around said ring, each of the guide assemblies including a first tab extending from one of the plates, a second top extending from the other of the plates to form a generally sliding contact between the first and second tabs as the plates move vertically to compress and/or release the coil springs wherein the first tab has a guide slot extending in a direction perpendicular to the plates and the second tab carries an assembled elongated guide member extending through the slot to guide vertical movement between the plates.

Method And Apparatus For Voltage Regulation Within An Integrated Circuit

US Patent:
7109783, Sep 19, 2006
Filed:
May 18, 2004
Appl. No.:
10/847966
Inventors:
Venu M. Kondapalli - Sunnyvale CA, US
Martin L. Voogel - Los Altos CA, US
Philip D. Costello - Saratoga CA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
G05F 1/10
US Classification:
327540, 327407
Abstract:
Method and apparatus for regulating voltage within an integrated circuit is described. For example, a voltage regulator receives a first reference voltage and produces a regulated voltage. A comparator includes a first input for receiving a second reference voltage and a second input for receiving the regulated voltage. The comparator includes an offset voltage. The comparator produces a control signal indicative of whether the difference between the second reference voltage and the regulated voltage is greater than a predetermined offset voltage. A clamp circuit clamps the regulated voltage to the second reference voltage in response to the control signal. In another example, the clamp circuit is removed and a multiplexer selects either a first reference voltage or a second reference voltage to be coupled to a voltage regulator. The multiplexer is controlled via output of a comparator that compares the first reference voltage and the second reference voltage.

Method Of Measuring Performance Of A Semiconductor Device And Circuit For The Same

US Patent:
7119570, Oct 10, 2006
Filed:
Apr 30, 2004
Appl. No.:
10/836850
Inventors:
Manoj Chirania - Palo Alto CA, US
Venu M. Kondapalli - Sunnyvale CA, US
Martin L. Voogel - Los Altos CA, US
Philip Costello - Saratoga CA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
G01R 31/26
US Classification:
324765
Abstract:
A test circuit to test rise delay/fall delay performance on a semiconductor device may comprise a latch to latch data at its input responsive to a clock signal. The latch may source an output signal related to the data latched. A buffer chain may be configured to serially propagate the signal sourced by the latch from the latch output back to the clock input, as the clock signal. A reset/set input of the latch may be configured to receive a reset/set signal from an intermediate node of the buffer chain.

Method And Apparatus For Voltage Regulation Within An Integrated Circuit

US Patent:
6753722, Jun 22, 2004
Filed:
Jan 30, 2003
Appl. No.:
10/354560
Inventors:
Venu M. Kondapalli - Sunnyvale CA
Martin L. Voogel - Los Altos CA
Philip D. Costello - Saratoga CA
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
G05F 110
US Classification:
327540
Abstract:
Method and apparatus for regulating voltage within an integrated circuit is described. For example, a voltage regulator receives a first reference voltage and produces a regulated voltage. A comparator includes a first input for receiving a second reference voltage and a second input for receiving the regulated voltage. The comparator includes an offset voltage. The comparator produces a control signal indicative of whether the difference between the second reference voltage and the regulated voltage is greater than a predetermined offset voltage. A clamp circuit clamps the regulated voltage to the second reference voltage in response to the control signal. In another example, the clamp circuit is removed and a multiplexer selects either a first reference voltage or a second reference voltage to be coupled to a voltage regulator. The multiplexer is controlled via output of a comparator that compares the first reference voltage and the second reference voltage.

High Speed Configurable Transceiver Architecture

US Patent:
7187709, Mar 6, 2007
Filed:
Mar 1, 2002
Appl. No.:
10/090250
Inventors:
Suresh M. Menon - Sunnyvale CA, US
Atul V. Ghia - San Jose CA, US
Warren E. Cory - Redwood City CA, US
Paul T. Sasaki - Sunnyvale CA, US
Philip M. Freidin - Sunnyvale CA, US
Santiago G. Asuncion - San Jose CA, US
Philip D. Costello - San Jose CA, US
Vasisht M. Vadi - Mountain View CA, US
Adebabay M. Bekele - San Jose CA, US
Hare K. Verma - Cupertino CA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
H04B 1/38
H04L 5/16
US Classification:
375219, 375222, 341100, 326 38, 326 39, 326 41, 326 47
Abstract:
One or more configurable transceivers can be fabricated on an integrated circuit. The transceivers contain various components having options that can be configured by turning configuration memory cells on or off. The integrated circuit may also contain programmable fabric. Other components in the transceivers can have options that are controlled by the programmable fabric. The integrated circuit may also contain one or more processor cores. The processor core and the transceivers can be connected by a plurality of signal paths that pass through the programmable fabric.

Programmable Lookup Table With Dual Input And Output Terminals In Shift Register Mode

US Patent:
7215138, May 8, 2007
Filed:
Jun 14, 2005
Appl. No.:
11/152590
Inventors:
Venu M. Kondapalli - Sunnyvale CA, US
Trevor J. Bauer - Boulder CO, US
Manoj Chirania - Palo Alto CA, US
Philip D. Costello - Saratoga CA, US
Steven P. Young - Boulder CO, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
H03K 19/173
US Classification:
326 38, 326 41
Abstract:
A programmable lookup table for an integrated circuit (IC) optionally provides two input signals and two output signals to an interconnect structure of the programmable IC when programmed to function as shift register logic. According to one embodiment, an integrated circuit includes an interconnect structure and a N-input lookup table (LUT) having input and output terminals coupled to the interconnect structure, where N is a integer. The LUT can be configured to function as a (2**(N−1))-bit shift register having a shift in input signal and one output signal coupled to the interconnect structure, or as a two (2**(N−2))-bit shift registers having two shift in input signals and two output signals coupled to the interconnect structure. In some embodiments, each bit of the shift register includes two memory cells of the LUT, a first memory cell functioning as a master latch and a second memory cell functioning as a slave latch.

FAQ: Learn more about Philip Costello

How old is Philip Costello?

Philip Costello is 78 years old.

What is Philip Costello date of birth?

Philip Costello was born on 1946.

What is Philip Costello's email?

Philip Costello has such email addresses: costello***@hotmail.com, dcoste***@comcast.net, philcostell***@gateway.net, philip.coste***@cableone.net, philip.coste***@yahoo.com, philip_costello2***@yahoo.com. Note that the accuracy of these emails may vary and they are subject to privacy laws and restrictions.

What is Philip Costello's telephone number?

Philip Costello's known telephone numbers are: 954-837-0373, 203-288-6325, 281-331-9842, 386-682-3062, 617-847-1485, 724-228-4345. However, these numbers are subject to change and privacy restrictions.

How is Philip Costello also known?

Philip Costello is also known as: Philip A Costello, Kathy Costello, Katherine Costello, Pkilip Costello, Kathryn M Costello, Kathryn A Costello, Kathryn H Costello, Phillip T Costello, Phillip A Costello, Phil A Costello. These names can be aliases, nicknames, or other names they have used.

Who is Philip Costello related to?

Known relatives of Philip Costello are: Evan Roach, Hannah Roach, Elizabeth Costello, Sharon Costello, Christopher Costello, Joni Loughney, Scott Loughney. This information is based on available public records.

What are Philip Costello's alternative names?

Known alternative names for Philip Costello are: Evan Roach, Hannah Roach, Elizabeth Costello, Sharon Costello, Christopher Costello, Joni Loughney, Scott Loughney. These can be aliases, maiden names, or nicknames.

What is Philip Costello's current residential address?

Philip Costello's current known residential address is: 177 Camino Vista Real, Chula Vista, CA 91910. Please note this is subject to privacy laws and may not be current.

What are the previous addresses of Philip Costello?

Previous addresses associated with Philip Costello include: 1420 Nw 126Th Ave, Ft Lauderdale, FL 33323; 1570 128Th, Sunrise, FL 33323; 1125 Ascot Way, Bartlett, IL 60103; 1212 E Pratt Dr, Palatine, IL 60074; 1307 E Sanborn Dr, Palatine, IL 60074. Remember that this information might not be complete or up-to-date.

Where does Philip Costello live?

Chula Vista, CA is the place where Philip Costello currently lives.

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