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Keith Bean

In the United States, there are 225 individuals named Keith Bean spread across 45 states, with the largest populations residing in Texas, California, North Carolina. These Keith Bean range in age from 38 to 71 years old. Some potential relatives include Sally Garcia, Bill Bean, Keith Bean. You can reach Keith Bean through various email addresses, including jessica.b***@msn.com, keith.b***@yahoo.com, keith.b***@msn.com. The associated phone number is 281-982-3309, along with 6 other potential numbers in the area codes corresponding to 303, 304, 402. For a comprehensive view, you can access contact details, phone numbers, addresses, emails, social media profiles, arrest records, photos, videos, public records, business records, resumes, CVs, work history, and related names to ensure you have all the information you need.

Public information about Keith Bean

Resumes

Resumes

Clinical Engineer And Lso

Keith Bean Photo 1
Location:
Southport, NC
Industry:
Hospital & Health Care
Work:
Dosher Memorial Hospital
Clinical Engineer and Lso Amsco-American Sterilizer Jul 1991 - Oct 1996
Clinical Engineer
Education:
Caldwell Community College and Technical Institute 1989 - 1991
Associates, Medical Engineering
Skills:
Biomedical Engineering, Medical Imaging, Clinical Research, Mri, Healthcare Information Technology, Healthcare, Radiology, Pacs, Healthcare Management, Medical Devices, Ultrasound, Hospitals
Languages:
English

Principal Software Engineer

Keith Bean Photo 2
Location:
Cedar Rapids, IA
Industry:
Computer Software
Work:
Rockwell Collins
Senior Systems Engineer Xilinx Jan 2001 - Dec 2014
Senior Staff Software Engineer Collins Aerospace Jan 2001 - Dec 2014
Principal Software Engineer
Education:
Iowa State University
Skills:
Embedded Systems, Embedded Software, Software Engineering, C, C++, Linux, Perl, Testing, Debugging, System Architecture, Python

Agent

Keith Bean Photo 3
Location:
3321 Glen Rose Hwy, Granbury, TX 76048
Industry:
Insurance
Work:
Prudential Financial Dec 1981 - Apr 1994
Agent and Manager Bean Insurance Agency Dec 1981 - Apr 1994
Agent United States Air Force Jul 1977 - Aug 1981
Pilot and Aircraft Commander B-52D
Education:
West Virginia University 2002 - 2007
Bachelors, Bachelor of Science West Virginia University 1968 - 1972
Bachelors, Bachelor of Science, Business Administration, Management, Business Administration and Management
Skills:
Property and Casualty Insurance

Automation Technician

Keith Bean Photo 4
Location:
Evansville, IN
Industry:
Automotive
Work:
Pittsburgh Glass Works, Llc
Automation Technician Control Systems Design & Automation May 2014 - Jan 2015
Controls Designer New Mather Metals, Inc. Jun 2002 - Apr 2014
Electrical Automation and Controls Technician Abc Technologies 400 Abc Boulevard Jul 2001 - Jun 2002
Maintenance Lead Del-Met Feb 1997 - Jul 2001
Maintenance Supervisor Kenco Plastics Jul 1992 - Feb 1997
Maintenance Supervisor Horn’s Service Dec 1990 - Jul 1992
Hvac Technician Hunter-Douglas May 1985 - Dec 1990
Process Technician
Education:
Itt Technical Institute 1985 - 1987
Associates, Associate of Arts, Electrical Engineering Daviess County High School 1980 - 1984
Skills:
Preventive Maintenance, Plc, Troubleshooting, Automation, Electricians, Process Improvement, Electronics, Maintenance and Repair, Electrical Controls, Hvac, Training, Leadership, Servo, Facilities Management, Robot, Industrial Engineering, Heating
Interests:
Golf Enthusiast

Owner

Keith Bean Photo 5
Location:
1501 Bayview Dr, Fort Lauderdale, FL 33304
Industry:
Sports
Work:
Http://Recruitcity.com
Owner
Education:
Florida State University - College of Business 1995 - 1999
Cooper City High School
Florida State University

Chemist

Keith Bean Photo 6
Location:
High Point, NC
Industry:
Chemicals
Work:
Akzonobel
Chemist
Education:
High Point University
Master of Business Administration, Masters High Point University
Bachelors, Bachelor of Science, Business, Chemistry

Keith Bean

Keith Bean Photo 7
Location:
Clarkston, MI
Industry:
Automotive
Work:
Sgs
Director, Dealer Services Development Feldman Automotive Sep 2016 - Sep 2017
Director of Organizational Development and Performance Improvement Bmw of North America, Llc Nov 2013 - Sep 2016
Senior Coach - Executive Leadership and Organizational Development United States Marine Corps Aug 2010 - Aug 2016
Leadership Development Consultant Maritzcx Oct 2004 - Nov 2012
Performance Improvement Consultant Avid Learner, Inc. 2002 - 2004
Senior Consultant United States Marine Corps 1998 - 2002
Regional Director of Sales and Training
Education:
Grand Valley State University
Baker College Business and Corporate Services
Skills:
Leadership, Leadership Development, Training, Recruiting, Organizational Development, Coaching, Strategic Planning, Team Building, Consulting, Management Consulting, Performance Improvement, Change Management, Executive Coaching, Employee Engagement, Business Process Improvement, Management, Team Leadership, Culture Change, Program Management, Cross Functional Team Leadership, Employee Training, Strategy, Process Improvement, Workshop Facilitation, Training Delivery, Management Development, Personnel Management, Public Speaking, Talent Management, Continuous Improvement, Customer Experience, Personal Development, Project Management, Project Planning, Staff Development, Team Management, Microsoft Office, Sales and Leadership Training, Business Improvement Coach/Facilitator, Analytical Skills, Business Development
Interests:
Leadership Training
Culture Development
Research Analysis and Action Planning
Personal and Business Coaching
Strategic Planning
Sales Training

Ob And Gyn

Keith Bean Photo 8
Location:
Indianapolis, IN
Industry:
Medical Practice
Work:
Community Phyicians of Indiana
Ob and Gyn
Education:
Indiana University School of Medicine 1985 - 1989
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Phones & Addresses

Name
Addresses
Phones
Keith Bean
937-723-7414
Keith Bean
978-688-3285
Keith Bean
281-982-3309
Keith A Bean
949-363-1250
Keith A Bean
916-991-4211
Keith Bean
303-663-5329
Keith A Bean
916-991-4211

Business Records

Name / Title
Company / Classification
Phones & Addresses
Keith Bean
Vice-President
Woodhead Industries, Inc
Mfg Elec Connectors Mfg Elec Components Mfg Conductive Wire Dvcs · Whol Electrical Equipment Mfg Electrical Industrial Apparatus
333 Knightsbridge Pkwy, Half Day, IL 60069
847-353-2500
Keith Bean
Director
BEAN INSURANCE AGENCY, LLC
Insurance Agent/Broker Fire/Casualty Insurance Carrier · Insurance Companies
3321 Gln Rose Hwy, Granbury, TX 76048
817-573-6720, 817-732-0056
Mr. Keith Bean
President
Brockville Motor Sales Ltd.
1649123 Ontario Inc.
Auto Dealers-New Cars
1240 Stewart Boulevard, Brockville, ON K6V 7H2
613-342-5244, 613-342-2590
Keith Bean
President, Director
KRB HOLDINGS INC
Holding Company
2201 Mariner Dr #213, Fort Lauderdale, FL 33316
3101 Prt Royale Blvd, Fort Lauderdale, FL 33308
1617 SE 15 St, Fort Lauderdale, FL 33316
903 Sunrise Ln, Fort Lauderdale, FL 33304
Keith Bean
President,Chairman
C B S MARKETING ENTERPRISES, INC
614 N Pierce Rd, Spokane, WA 99206
Keith Bean
President
Brockville Motor Sales Ltd
Auto Dealers-New Cars
613-342-5244, 613-342-2590
Keith B. Bean
JUMP UP RECORDS, INC
Keith Bean
President
AED SAVES INC
1501 Bayview Dr #104, Fort Lauderdale, FL 33304

Publications

Us Patents

Determining Networks Of A Tile Module Of A Programmable Logic Device

US Patent:
7536668, May 19, 2009
Filed:
Aug 11, 2006
Appl. No.:
11/502923
Inventors:
Bart Reynolds - Seattle WA, US
Keith R. Bean - Greeley CO, US
Daniel P. Kirkwood - Denver CO, US
James F. Barei - Seattle WA, US
Benjamin D. Ralston - Bellevue WA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
G06F 17/50
US Classification:
716 16, 716 12, 716 17, 716 18
Abstract:
A processor-implemented method is provided for determining networks of a tile module of a programmable logic device (PLD) design. A netlist describing the PLD design and a tile module identification are input. Characterization data is input for a sub-module of the tile module that specifies modeled pins of the sub-module, which is either a switchbox or a logic site. Connectivity pins of the tile module are determined. Each connectivity pin of one of the tile instances is connected in the netlist to a modeled pin of an instance of the sub-module within a tile instance. Networks of the tile module are determined that connect a first subset of the connectivity pins of the tile module and a second subset of the modeled pins of an instance of the sub-module within the tile module. A specification is output for each of the networks including the first subset and the second subset.

Constructing A Model Of A Programmable Logic Device

US Patent:
7584448, Sep 1, 2009
Filed:
Aug 11, 2006
Appl. No.:
11/502936
Inventors:
Bart Reynolds - Seattle WA, US
Keith R. Bean - Greeley CO, US
Daniel P. Kirkwood - Denver CO, US
James F. Barei - Seattle WA, US
Benjamin D. Ralston - Bellevue WA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
G06F 17/50
US Classification:
716 16, 716 12, 716 18
Abstract:
A processor-implemented method is provided for constructing a model of a programmable logic device (PLD) design. A netlist is input that describes the PLD design. An identification is input of programmable tile modules that include a programmable resource, which is either programmable interconnect or programmable logic. A first characterization data is input for sub-modules of the programmable tile modules for the programmable resource. For each programmable tile module, the routing arcs of each programmable interconnect are generated. A second characterization data is input for a configuration memory cell module of the PLD design. A third characterization data is input for a configuration control module of the PLD design. A first map is generated that links each routing arc to a bit of configuration data for programming the programmable interconnect. A second map is generated that links each logic function to a bit of configuration data for programming the programmable logic.

Determining Reachable Pins Of A Network Of A Programmable Logic Device

US Patent:
7451420, Nov 11, 2008
Filed:
Aug 11, 2006
Appl. No.:
11/502937
Inventors:
Bart Reynolds - Seattle WA, US
Keith R. Bean - Greeley CO, US
Daniel P. Kirkwood - Denver CO, US
James F. Barei - Seattle WA, US
Benjamin D. Ralston - Bellevue WA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
G06F 17/50
US Classification:
716 12, 716 16
Abstract:
A processor-implemented method is provided for determining reachable pins functionally connected to a network of a netlist that describes a programmable logic device (PLD) design. A netlist and an identification of the network in the netlist are input. Characterization data is input for one or more repeater modules that specify a first set of functionally connected pins of the repeater module. A second set is initialized with the pins of the network. For each pin in the second set that is one of the functionally connected pins of a first set, an additional pin may be added to the second set for each of the pins of a network for each of the functionally connected pins. The adding is repeated for each additional pin added to the second set. A specification of the pins from the second set is output as the reachable pins.

Pld Device Representation With Factored Repeatable Tiles

US Patent:
7107565, Sep 12, 2006
Filed:
Jul 25, 2003
Appl. No.:
10/627510
Inventors:
Jeffrey V. Lindholm - Longmont CO, US
Keith R. Bean - Johnstown CO, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
G06F 17/50
US Classification:
716 16
Abstract:
Structures and methods of representing programmable PLD hardware tiles including common routing resources common to all of the hardware tiles and unique logic resources unique to each hardware tile. A software representation of the programmable hardware tiles includes a common software tile including a description of the common routing resources, and, for each hardware tile, a unique software tile including a description of the unique logic resources included in the hardware tile. The common software tile has first terminals for coupling an instance of the common software tile to other instances of the common software tile, and also has second terminals. The unique software tile includes terminals for coupling the unique software tile to the second terminals of an instance of the common software tile. The software representation can also include a PLD device model that utilizes a uniform numbering scheme based on numbered instances of the common software tile.

Hanging Ornament With Central Light, Lenses, And Spires

US Patent:
2005023, Oct 20, 2005
Filed:
Apr 17, 2004
Appl. No.:
10/826884
Inventors:
Kevin Bixler - Littleton CO, US
Deanna Bixler - Littleton CO, US
Keith Bean - Johnstown CO, US
International Classification:
F21V021/00
US Classification:
362565000, 362806000
Abstract:
The present invention teaches a hanging ornament having a central core and a plurality of radiating spires. Each spire allows light to pass. An electrical cord having a plug suitable for connection to local electrical outlets leads to wiring within the core, which in turn provides electricity to a centrally located light bulb. Each spire is seated in a socket which connects one spire to the core. Lenses may advantageously be employed with the spires to focus the light. Light steps within the hollow spires may aid in light diffusion, for example by having surface areas in accordance with the inverse square law, or fiber optic bundles within the spires may serve the same purpose.

Determining Indices Of Configuration Memory Cell Modules Of A Programmable Logic Device

US Patent:
7451423, Nov 11, 2008
Filed:
Aug 11, 2006
Appl. No.:
11/502909
Inventors:
Bart Reynolds - Seattle WA, US
Keith R. Bean - Greeley CO, US
Daniel P. Kirkwood - Denver CO, US
James F. Barei - Seattle WA, US
Benjamin D. Ralston - Bellevue WA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
G06F 17/50
H03K 17/693
US Classification:
716 16, 716 1, 716 12, 716 17, 716 18
Abstract:
A processor-implemented method is provided for determining first and second indices of cell instances of a configuration memory cell of a tile module of a programmable logic device (PLD) design. A netlist is input that describes the PLD design and includes the cell instances of the configuration memory cell. An identification of the tile module is input. Characterization data is input for each configuration memory cell specifying address and data input pins. Characterization data is input for each configuration control module specifying a first ordered set of address output pins and a second ordered set of data output pins. For each of the cell instances, the first index of an address output pin in the first ordered set and the second index of a data output pin in the second ordered set are determined and a specification is output of the cell instance and the first and second indices.

Hanging Ornament

US Patent:
2004019, Sep 30, 2004
Filed:
Mar 31, 2003
Appl. No.:
10/403776
Inventors:
Kevin Bixler - Littleton CO, US
Deanna Bixler - Littleton CO, US
Keith Bean - Johnstown CO, US
International Classification:
F21S004/00
US Classification:
362/565000
Abstract:
A hanging ornament having a central core and a plurality of radiating spires. Each spire is solid and allows light to pass. Within each spire is wiring and a string of small lights. An electrical cord having a plug suitable for connection to local electrical outlets leads to wiring within the core, which in turn provides electricity to a plurality of sockets. Each socket connects one spire to the core and further connects the core wiring to the spire wiring. Each spire may be removed individually and replaced should the lights within malfunction or the spire become broken. This also aids space saving storage of the invention. In embodiments, the lights of the spire may be mini lights, sub-miniature lights, light emitting diodes, high intensity light emitting diodes or combinations thereof. In other embodiments, the light passing spires may be textured, transparent, translucent, clear or colored, and in yet other embodiments, removable sheaths may be employed on the spires to provide color and/or to the light emitted by the spires. Various other embodiments are detailed in the body of the present document.

Determining Programmable Connections Through A Switchbox Of A Programmable Logic Device

US Patent:
7451424, Nov 11, 2008
Filed:
Aug 11, 2006
Appl. No.:
11/502911
Inventors:
Bart Reynolds - Seattle WA, US
Keith R. Bean - Greeley CO, US
Daniel P. Kirkwood - Denver CO, US
James F. Barei - Seattle WA, US
Benjamin D. Ralston - Bellevue WA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
G06F 17/50
H03K 17/693
US Classification:
716 16, 716 8, 716 12, 716 17, 711170, 711221
Abstract:
A processor-implemented method is provided for determining programmable connections through a switchbox module of a programmable logic device (PLD) design. A netlist that describes the PLD design and an identification of the switchbox module are input. Characterization data is input for each multiplexer module of the switchbox module. The characterization data specifies input pins and at least one output pin of the multiplexer module. The multiplexer module programmably connects each output pin to one of the input pins. Pins of the switchbox module are determined through which the programmable connections are provided via an instance of a multiplexer module of the switchbox module. Each pair of the pins of the switchbox module is determined that are functionally connected via at least one instance of the at least one multiplexer module, with each pair specifying a programmable connection. A specification of the programmable connections is output.

FAQ: Learn more about Keith Bean

What are Keith Bean's alternative names?

Known alternative names for Keith Bean are: Debbie Roberts, John Smith, April Smith, Damon Barnett, Joann Bean, Kendra Bean, Patricia Bean. These can be aliases, maiden names, or nicknames.

What is Keith Bean's current residential address?

Keith Bean's current known residential address is: 164 County Road 3128, Orange, TX 77632. Please note this is subject to privacy laws and may not be current.

What are the previous addresses of Keith Bean?

Previous addresses associated with Keith Bean include: 8301 Pomona, Rio Linda, CA 95673; 851 Barros, Sacramento, CA 95835; 140 Sunfish Dr, Highland, IL 62249; 3403 Pierland Dr, Pocahontas, IL 62275; 3909 Aberdeen Dr, Champaign, IL 61822. Remember that this information might not be complete or up-to-date.

Where does Keith Bean live?

Orange, TX is the place where Keith Bean currently lives.

How old is Keith Bean?

Keith Bean is 55 years old.

What is Keith Bean date of birth?

Keith Bean was born on 1968.

What is Keith Bean's email?

Keith Bean has such email addresses: jessica.b***@msn.com, keith.b***@yahoo.com, keith.b***@msn.com, jessica.b***@comcast.net, taylors***@aol.com, keith.b***@bigfoot.com. Note that the accuracy of these emails may vary and they are subject to privacy laws and restrictions.

What is Keith Bean's telephone number?

Keith Bean's known telephone numbers are: 281-982-3309, 303-663-5329, 304-296-0704, 402-891-6145, 405-603-3728, 409-746-2392. However, these numbers are subject to change and privacy restrictions.

Who is Keith Bean related to?

Known relatives of Keith Bean are: Debbie Roberts, John Smith, April Smith, Damon Barnett, Joann Bean, Kendra Bean, Patricia Bean. This information is based on available public records.

What are Keith Bean's alternative names?

Known alternative names for Keith Bean are: Debbie Roberts, John Smith, April Smith, Damon Barnett, Joann Bean, Kendra Bean, Patricia Bean. These can be aliases, maiden names, or nicknames.

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